Chip-to-chip communication is commonly implemented with high-speed, point-to-point links such as with differential point-to-point links transmitting differential data signals. Achievable data rates can be affected by voltage and timing margins of the transmitted signals. For example, deviations from specified transmitted voltage swings during operation can result in decreased margins and therefore a decreased data-rate. Unfortunately, it is difficult to control voltage swing levels because they vary with operating environment changes such as with changes in PVT (process, voltage, and temperature). Because PVT changes generally affect the various transmitter circuits within a chip the same, chips typically incorporate one or more distributed general compensation circuits to control multiple transmitter circuits reasonably proximal to the compensation circuit to compensate for such PVT variations. Such compensation circuits include driver current compensation (ICOMP) and termination resistor compensation (RCOMP) circuits to control (e.g., keep reasonably constant) drive currents and termination resistances in accordance with design specifications.
Unfortunately, however, within-die systematic and random process variations between the compensation circuits and the transmitter circuits they service, as well as between the transmitter circuit instances themselves, can undue some of the compensation achieved by the general compensation circuits. Thus, using such compensation circuits can still result in errors in the transmitter output voltage swing and thereby decrease the voltage margin available at the receiver decreasing achievable data rates.